New Products, Techniques, Trends, Algorithms, Ideas and Events in Embedded
Thursday, November 3, 2011
RTC Magazine's September 2011 Issue
http://upload.rtcgroup.com/rtcmagazine/digital/pdf/rtc1109.pdf
Important stories:
Important stories:
- Conductive Metal Oxide (CMOx) Memory technology to compete with NAND Flash.
- HP is weaker now, since its tablet lauch is failed
- MID → Mobile Internet Device: Between smart-phone and tablet
- Rugged device → Device equipped with for rough handling. Like military dress, devices
Tuesday, September 6, 2011
Wednesday, August 17, 2011
Some books regarding the Operating Systems internals:
Japanese:
①30日でできる! OS自作入門
②12ステップで作る組込みOS自作入門
③実用 組込みOS構築技法―情報通信を支える基礎技術RTOS入門
④SuperHで学ぶμITRON仕様OS―リアルタイムOSの動作原理と実装法がわかる!
⑤自分で作るLinux OS
⑥自分で作るLinux OS 最新版
English:
①Building a Real Time Operating System: RTOS from the Ground Up by Colin Walls
②Simple Real-Time Operating System: A Kernel Inside View for a Beginner By Chowdary Venkateswara
Initiative book for electronics:
①図解 つくる電子回路
Japanese:
①30日でできる! OS自作入門
②12ステップで作る組込みOS自作入門
③実用 組込みOS構築技法―情報通信を支える基礎技術RTOS入門
④SuperHで学ぶμITRON仕様OS―リアルタイムOSの動作原理と実装法がわかる!
⑤自分で作るLinux OS
⑥自分で作るLinux OS 最新版
English:
①Building a Real Time Operating System: RTOS from the Ground Up by Colin Walls
②Simple Real-Time Operating System: A Kernel Inside View for a Beginner By Chowdary Venkateswara
Initiative book for electronics:
①図解 つくる電子回路
Tuesday, August 2, 2011
Microcontrollers of this year
Kinetis K10, K20, K30, K40, K50, K60
AVR
Kits:
ATMEL AVRスタータキット
http://akizukidenshi.com/catalog/c/cavrw/
AVR
Kits:
ATMEL AVRスタータキット
http://akizukidenshi.com/catalog/c/cavrw/
How system calls implemented in RTOS
Apart from the scheduler, how system calls are implemented in Real-Time Operating Systems?
Sunday, July 31, 2011
JAVA in Embedded
Conventional Embedded systems involved only C and assembly languages. Now a days, the requirements for embedded systems widened beyond C and Embedded Database, Java and C++ in embedded systems become hot topics. So, let's update about the latest trends.
About Java in Embedded Systems:
http://www.netrino.com/Embedded-Systems/How-To/Embedded-Java
For more information about Java in Embedded:
http://www.netrino.com/taxonomy_menu/3/11
About Java in Embedded Systems:
http://www.netrino.com/Embedded-Systems/How-To/Embedded-Java
For more information about Java in Embedded:
http://www.netrino.com/taxonomy_menu/3/11
Saturday, July 30, 2011
Read 555 timer first
555 timer is used in many electronics project. So, first read about it and learn how to set the resistors to generate the waveform.
Read this:
http://www.sentex.ca/~mec1995/gadgets/555/555.html
Read this:
http://www.sentex.ca/~mec1995/gadgets/555/555.html
Friday, July 29, 2011
Wednesday, July 27, 2011
RTOS metrics
・Memory footprint → memory usage, RAM & ROM requirements
・Latency
・Interrupt latency
・Scheduling latency
・Services performance→Minimum time taken by a system call
Embedded Microprocessor Benchmark Consortium (EEMBC)
http://www.mentor.com/resources/techpubs/upload/mentorpaper_69305.pdf
・Latency
・Interrupt latency
・Scheduling latency
・Services performance→Minimum time taken by a system call
Embedded Microprocessor Benchmark Consortium (EEMBC)
http://www.mentor.com/resources/techpubs/upload/mentorpaper_69305.pdf
Tuesday, July 26, 2011
Interesting Story: Android
http://en.wikipedia.org/wiki/Android_(operating_system)
From RTC magazine,
• Devices with extremely limited RAM and persistent storage
• Closed-box designs
• Legacy support for RTOS APIs and other specialized interfaces
• Systems with pervasive hard real-time / low-latency response needs
• Designs built on “minority” CPU families or special-purpose silicon"
From RTC magazine,
"Certainly, Android is not ideal for all types of device designs. It presents a dazzling array of features and capabilities for mobile/wireless devices and an attractive OS option for other intelligent devices. In particular, Android is a viable alternative for designs that benefit from a graphical user interface, field-upgrade capability, a complement of ready-to-use applications, and both Java-style and native C/C++ runtimes.
It is a less attractive choice for
• Headless devices• Devices with extremely limited RAM and persistent storage
• Closed-box designs
• Legacy support for RTOS APIs and other specialized interfaces
• Systems with pervasive hard real-time / low-latency response needs
• Designs built on “minority” CPU families or special-purpose silicon"
THE DALVIK VIRTUAL MACHINE ARCHITECTURE
Know about Dalvik garbage collection
http://davidehringer.com/software/android/The_Dalvik_Virtual_Machine.pdf
http://davidehringer.com/software/android/The_Dalvik_Virtual_Machine.pdf
Tuesday, June 21, 2011
Thursday, May 12, 2011
Scheduling algorithms for Real-Time embedded processing
Good Introduction to Rate Monotonic scheduling algorithm.
http://www.netrino.com/Embedded-Systems/How-To/RMA-Rate-Monotonic-Algorithm
Know about other scheduling algorithms.
A good insight.
http://www.csie.ntu.edu.tw/~ktw/rts/ch-short-course-uni.pdf
Theory about other scheduling algorithms.
http://www.dauniv.ac.in/downloads/EmbsysRevEd_PPTs/Chap_8Lesson22EmsysNewOtherScdmethods.pdf
http://www.netrino.com/Embedded-Systems/How-To/RMA-Rate-Monotonic-Algorithm
Know about other scheduling algorithms.
A good insight.
http://www.csie.ntu.edu.tw/~ktw/rts/ch-short-course-uni.pdf
Theory about other scheduling algorithms.
http://www.dauniv.ac.in/downloads/EmbsysRevEd_PPTs/Chap_8Lesson22EmsysNewOtherScdmethods.pdf
Thursday, May 5, 2011
Perl for the day: while loop construct
use strict;
use warnings;
# to play cricket in my perl program
print "\nPress any of 0 to 9\n\n";
use Term::ReadKey;
my $bat = 1;
my $player;
my $num;
my $team;
my $ran = 0;
my $spot = 0;
my @res;
ReadMode 'cbreak';
while (++$spot < 3) {
print "Team: ", $spot, "\n";
$num = 0;
$team = 0;
while (++$num < 11) {
print " Player ", $num, ": ";
$player = 0;
while ($bat != 0) {
$bat = int(ReadKey(0));
$ran = int(rand(12345)) + $bat;
$bat = $ran % 6;
if ($bat != 0) {
print $bat, "+";
}
$player += $bat;
}
print "=", $player, "\n";
$team += $player;
$bat = 1;
}
print " Total score = ", $team,"\n";
$res[$spot] = $team;
}
if ($res[1] > $res[2]) {
print "Team 1 Won\n";
} elsif ($res[2] > $res[1]) {
print "Team 2 Won\n";
} else {
print "Match Tie\n";
}
Tuesday, May 3, 2011
Perl for the day: for loop construct handling array
use strict;
use warnings;
# fibonacci sequence/series using array in Perl
my $i;
my @ser = (0, 1);
for ($i = 2; $i < $ARGV[0]; $i++) {
$ser[$i] = $ser[$i - 1] + $ser[$i - 2];
}
for ($i = 0; $i < $ARGV[0]; $i++) {
print $ser[$i]," ";
}
use warnings;
# fibonacci sequence/series using array in Perl
my $i;
my @ser = (0, 1);
for ($i = 2; $i < $ARGV[0]; $i++) {
$ser[$i] = $ser[$i - 1] + $ser[$i - 2];
}
for ($i = 0; $i < $ARGV[0]; $i++) {
print $ser[$i]," ";
}
dcbst - Data Cache Block Store instruction in PowerPC
If the byte specified by the effective address (EA) is cached by the data cache and the cache-line is modified (dirty), the entire contents of the cache-line are written to system memory. After the store completes, the cache-line is marked as unmodified (not dirty). But, the cache-line is not invalidated
dcba, dcbz, dcbt, dcbtst cache control instructions in PowerPC
dcba - Data Cache Block Allocate
dcbz - Data Cache Block set to Zero
dcbt - Data Cache Block Touch
dcbtst - Data Cache Block Touch for Store
are called data-cache hint instructions. These instructions are used to improve the memory performance by avoiding cache miss. With these instructions, the cache lines corresponding to memory locations that are likely to be accessed in the near future can be allocated speculatively to avoid cache-miss. For example, with dcbt and dcbtst instructions, if the byte specified by the effective address (EA) is cacheable and is not currently cached by the data cache, the cacheline containing that byte is loaded into the data cache from main memory.
dcbt and dcbtst instructions are further optimized to dcba and dcbz instructions where the cache lines are allocated for the effective address (EA) without copying data from system memory where the contents of the main memory are no longer needed or the memory block can be initialized to zero.
What is Big Endian and Little Endian?: In Words
Big Endian means Most Significant Byte (MSB) is at the lowest address.
Little Endian means Most Significant Byte (MSB) is at the highest address.
Monday, May 2, 2011
Advantages of FPGA
The main advantage of FPGA is that high speed and parallel processing can be easily implemented.Industrial embedded systems typically require high I/O counts, making parallel IP blocks in FPGA fabric well-suited for managing analog, digital, and communications interrupts that would otherwise bog down an embedded processor. For example, in Telecom, Video processing, Digital Signal processing, High speed Real-Time processing, fixed processing logic can be implemented in Hardware through FPGA.
Then, other advantages such as:
www.men.de/docs-ext/expertise/pdf/fpga_advantages.pdf
www.canterbury-consulting.co.uk/.../fpga.../56-advantages-of-fpga-devices
www.men.de/docs-ext/expertise/pdf/fpga_advantages.pdf
www.canterbury-consulting.co.uk/.../fpga.../56-advantages-of-fpga-devices
The PowerPC Architecture: Software Programming summary
Things to be take care when programming or porting to PowerPC CPU architecture.
The PowerPC Architecture: A programmer's view
class.ee.iastate.edu/cpre211/handouts/xc_ibm_pwrpc42.pdf
In Japanese:
http://japan.xilinx.com/xcell/xl42/xcell_42_05.pdf
The PowerPC Architecture: A programmer's view
class.ee.iastate.edu/cpre211/handouts/xc_ibm_pwrpc42.pdf
In Japanese:
http://japan.xilinx.com/xcell/xl42/xcell_42_05.pdf
RTC Magazine`s April Issue
Get April issue of RTC magazine in the following link:
http://upload.rtcgroup.com/rtcmagazine/digital/pdf/rtc1104.pdf
http://upload.rtcgroup.com/rtcmagazine/digital/pdf/rtc1104.pdf
Perl for the day: for loop construct
use strict;
use warnings;
# fibonacci sequence/series in Perl
my $cur = 1;
my $prev = 0;
my $i, my $tmp;
print $prev, " ";
for ($i = 0; $i < $ARGV[0]; $i++) {
print $cur, " ";
$tmp = $cur;
$cur += $prev;
$prev = $tmp;
}
use warnings;
# fibonacci sequence/series in Perl
my $cur = 1;
my $prev = 0;
my $i, my $tmp;
print $prev, " ";
for ($i = 0; $i < $ARGV[0]; $i++) {
print $cur, " ";
$tmp = $cur;
$cur += $prev;
$prev = $tmp;
}
Friday, April 29, 2011
IPv6 Socket programming
A detailed programming guide to program in Perl, PHP.
http://www.euchinagrid.org/IPv6/IPv6_presentation/Introduction_to_IPv6_programming.pdf
http://www.euchinagrid.org/IPv6/IPv6_presentation/Introduction_to_IPv6_programming.pdf
Thursday, April 28, 2011
Difference between semaphore and mutex
A good deeper insight with the following highlights:
1) Mutex can only be used to lock and unlock a shared resource or critical section. But, semaphore can also be used for signalling too.
2) Mutex can be unlocked only by the task itself. But, semaphore can be signalled from any other task.
3) Mutex has built-in implementation to avoid priority inversion. But, semaphore do not implement. Though binary semaphore is equivalent to mutex, it can not avoid priority inversion.
http://www.netrino.com/Embedded-Systems/How-To/RTOS-Mutex-Semaphore
1) Mutex can only be used to lock and unlock a shared resource or critical section. But, semaphore can also be used for signalling too.
2) Mutex can be unlocked only by the task itself. But, semaphore can be signalled from any other task.
3) Mutex has built-in implementation to avoid priority inversion. But, semaphore do not implement. Though binary semaphore is equivalent to mutex, it can not avoid priority inversion.
http://www.netrino.com/Embedded-Systems/How-To/RTOS-Mutex-Semaphore
Wednesday, April 27, 2011
Type of Kernels
- Monolithic Kernel
- Micro Kernel
- Hybrid Kernel
- Nano Kernel
- Exo Kernel
http://www.systhread.net/texts/200510kdiff.php
http://en.wikipedia.org/wiki/Kernel_(computing)
Monday, April 25, 2011
Perl for the day: Conditional construct
use strict;
use warnings;
if($#ARGV + 1 < 1) {
print "Vaadaa\n";
}
else {
print "Podaaa\n";
}
use warnings;
if($#ARGV + 1 < 1) {
print "Vaadaa\n";
}
else {
print "Podaaa\n";
}
What is Last Level Cache (LLC)?
You must have heard of L2 cache which is nothing but Level 2 cache. The next level, that is Level 3 cache in Intel processors is called as Last Level Cache. In multi-core Intel processors, the LLC is shared not only between each CPU core, but also between the GPU(Graphics processing unit) core. With ring bus structure, LLC shortens the access latency for CPU and GPU cores.
Friday, April 22, 2011
Perl for the day: Assigning variables
use strict;
use warnings;
# scalar
my $number = 72;
my $strin = "kutti";
my $cha = 'a';
# array
my @arr = (34,56,78,90);
my @sarr = ("amm ", "app ", "tha ", "akk ", "mam ", "kul ", "jai ", "all ");
my @carr = ('a','b','c','d');
print $number,"\n";
print $strin,"\n";
print $cha, "\n";
print $arr[3],"\n";
print $sarr[4],"\n";
print $carr[3],"\n";
print @sarr[4, 5, 6],"\n";
print @carr[0, 1, 2, 3],"\n";
use warnings;
# scalar
my $number = 72;
my $strin = "kutti";
my $cha = 'a';
# array
my @arr = (34,56,78,90);
my @sarr = ("amm ", "app ", "tha ", "akk ", "mam ", "kul ", "jai ", "all ");
my @carr = ('a','b','c','d');
print $number,"\n";
print $strin,"\n";
print $cha, "\n";
print $arr[3],"\n";
print $sarr[4],"\n";
print $carr[3],"\n";
print @sarr[4, 5, 6],"\n";
print @carr[0, 1, 2, 3],"\n";
Self-Employment for Embedded Engineers
Nobody can predict how the future will be. In case an embedded engineer losts job, what he can do? Better be prepared of the following skills.
1) Assemble a computer - Start a shop to assemble and to sell computer, laptops at affordable prices
2) Electronic embedded kit sales - Sell electronic components to build small electronic projects and advanced electronic development kit for projects of college students
2) Online tutor to teach embedded technology
1) Assemble a computer - Start a shop to assemble and to sell computer, laptops at affordable prices
2) Electronic embedded kit sales - Sell electronic components to build small electronic projects and advanced electronic development kit for projects of college students
2) Online tutor to teach embedded technology
Thursday, April 21, 2011
Hyper-Threading technology
Intel Hyper-Threading Technology causes a single core to appear as two logical processors, allowing the OS to schedule two threads simultaneously.
Introduction is follows:
http://www.makeuseof.com/tag/hyperthreading-technology-explained/
More technically as follows:
ftp://download.intel.com/technology/itj/2002/volume06issue01/art01_hyper/vol6iss1_art01.pdf
Introduction is follows:
http://www.makeuseof.com/tag/hyperthreading-technology-explained/
More technically as follows:
ftp://download.intel.com/technology/itj/2002/volume06issue01/art01_hyper/vol6iss1_art01.pdf
Saturday, April 16, 2011
Perl for the day: Print number
use strict;
use warnings;
print 45;
print "\n";
print 456.455
use warnings;
print 45;
print "\n";
print 456.455
Friday, April 15, 2011
Thursday, April 14, 2011
Perl for the day: Hello World
Download perl for Windows from the following URL and install it.
http://www.activestate.com/activeperl/downloads
-- hello.pl --
use strict;
use warnings;
print("Hello World\n");
http://www.activestate.com/activeperl/downloads
-- hello.pl --
use strict;
use warnings;
print("Hello World\n");
Technology of the day: Smart grid
What is smart grid?
http://www.nema.org/gov/energy/smartgrid/whatIsSmartGrid.cfm
http://en.wikipedia.org/wiki/Smart_grid
http://ec.europa.eu/research/energy/pdf/smartgrids_en.pdf
How embedded involved in smart grid?
http://blog.vdcresearch.com/embedded_hw/2011/01/the-smart-grid-is-creating-new-opportunities-for-embedded-processors.html
http://www.trentontechnology.com/images/stories/tech_info_pdfs/White_Papers/trenton_embedded_computing_enables_smart_grid_technology_whitepaper.pdf
Design a smart grid for your mothernation.
http://www.nema.org/gov/energy/smartgrid/whatIsSmartGrid.cfm
http://en.wikipedia.org/wiki/Smart_grid
http://ec.europa.eu/research/energy/pdf/smartgrids_en.pdf
How embedded involved in smart grid?
http://blog.vdcresearch.com/embedded_hw/2011/01/the-smart-grid-is-creating-new-opportunities-for-embedded-processors.html
http://www.trentontechnology.com/images/stories/tech_info_pdfs/White_Papers/trenton_embedded_computing_enables_smart_grid_technology_whitepaper.pdf
Design a smart grid for your mothernation.
Wednesday, April 13, 2011
Embedded Systems Expo(ESEC) 2011
Japan hosts Embedded Systems Expo-2011 from 11-May-2011 to 13-May-2011 at Tokyo Big Sight. Embedded Technology is exhibited under the following zones. The first four zones have been introduced newly.
- Power Electronics
- Android development
- Wireless energy transfer
- Digital signage devices
- Embedded board computer EXPO
- Voice recognition and Text-to-speech
- Test and verification
- Embedded Image and video processing
- Motion control
- Wireless communication
- Touch panels and displays
- Design and development services/Consulting
- Embedded Training
Boot Linux from USB device without affecting Windows in hard disk
When you need a Linux system for testing or development, no need to go for a separate Linux PC. Just boot your windows PC as Linux box.
http://monoist.atmarkit.co.jp/mn/articles/0807/22/news124.html
(in Japanese)
RTC magazine digital issue for March 2011
Download the digital edition at the following link and update your embedded knowledge.
http://upload.rtcgroup.com/rtcmagazine/digital/pdf/rtc1103.pdf
Features:
http://upload.rtcgroup.com/rtcmagazine/digital/pdf/rtc1103.pdf
Features:
- Like "optimizing for speed", new trend of "Optimizing Code for Power" has been introduced in debugging and development tools. Debugger profiles the power consumption in correlation with source code.
Saturday, April 9, 2011
Thunderbolt: Apple and Intel`s new Interface
Thunderbolt is Apple and Intel`s new interface to compete with USB 3.0. Thunderbold is 10 Gbps speed against with 5 Gbps USB 3.0.
Read in detail:
http://techlogg.com/2011/02/thunderbolt-intel-and-apples-usb3-0-killer/2172
Read in detail:
http://techlogg.com/2011/02/thunderbolt-intel-and-apples-usb3-0-killer/2172
Friday, April 8, 2011
KOZOS Real Time OS by Japanese Engineers
Japanese Engineers develop Real Time OS called KOZOS as a hobby and for learning purpose by themselves.
http://kozos.jp/kozos/
http://kozos.jp/kozos/
ARM Cortex-9 based Xilinx Platform Zynq-7000 released
http://www.xilinx.com/technology/roadmap/processing-platform.htm
Features:
Features:
- Extensible processing platform which means the processing core (ARM`s Dual core Cortex-9 MPcore) is fully integrated and hardwired, using standard design methods, and includes caches, timers, interrupts, switches, memory controllers, and commonly used connectivity and I/O peripherals.
- Extensibility is enabled by the use of high-bandwidth AMBA-AXI (Advanced Extensible
Interface) interconnects. In other words, custom accelerators and peripherals can be integrated through programmable logic.
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